Cellular SOC Design Verification Engineer - Entry Level
Summary
Posted: Oct 24, 2024
Role Number:200575466
Do you have a passion for invention and self-challenge? This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Apple??s Silicon Engineering Group has embarked upon to-date. As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state-of-the-art Cellular SoCs!
You will have the opportunity to contribute to the verification effort of a set of complex SOCs delivering the Cellular solution. You will integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM based test bench, implement effective coverage driven and directed test suites, deploy new tools and methodologies to deliver chips that are right-first-time. By collaborating with other product development groups across Apple, you can push the industry boundaries of what cellular systems can do and improve the product experience for our customers across the world!
Description
Description
Through this experience, you will learn all aspects of a large scale SOC design, Complex verification test benches, different types of SOC architectures, multiple high speed protocols, industry-standard low power architecture, best in class DV methodology, verification on accelerated platforms, knowledge on Cellular protocol, FW- HW interactions, complexities of multi-chip SOC debug architecture, etc.
Minimum Qualifications
Minimum Qualifications
?? BSEE or BSCS is required.
?? Object Oriented Programming.
?? Coursework in Digital Design.
Key Qualifications
Key Qualifications
Preferred Qualifications
Preferred Qualifications
?? MSEE, MSCS or beyond is preferred.
?? Coursework in Computer Architecture, Networking Protocol.
?? Should be a great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
?? Programming experience in SystemVerilog, Python, C++.
Education & Experience
Education & Experience
Additional Requirements
Additional Requirements
Pay & Benefits
Pay & Benefits
?? At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple??s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple??s Employee Stock Purchase Plan. You??ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses ?? including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
More
?? Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
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